how can I calculate the largest size of memory that can be used with a 16 bit address bus and a 8 bit data bus?
Is it 2**16 bytes - with regard to the address bus - or 1 byte - with regard to the data bus?
Answer
It is the address bus bit count that determines how many locations you may pinpoint.
And yes, '2' to the power of 'bits' tells the amount.
In case of a longer read/write (16, 32 or even more bits) the "next" adress required is read.
Note also the difference between small-endian and big-endian CPU's; see
http://en.wikipedia.org/wiki/Endianness
The data bus size determines how big chunks the CPU will transfer at a time (for one read operation), it doesn't "stop" the ability to read more (e.g. the old M68008 is a 16/32 bit CPU - having fourteen 32bit registers, combined with an 8 bit external data bus - reading/writing 32 bits from/to memory is handled by the internal logic of the CPU - but takes longer as it has to be completed in several memory access operations).
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